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      InterruptRegIf2
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  <p class="regif-title"> InterruptRegIf2 Interface Document </p>
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  <div class="table">
  <table  align="center" class="theme-default">
      <br/>

      <thead>
        <tr align="center" >
          <th>AddressOffset</th>
          <th>RegName</th>
          <th>Description</th>
          <th>Width</th>
          <th>Section</th>
          <th>FieldName</th>
          <th>R/W</th>
          <th>Reset value</th>
          <th>Field-Description</th>
        </tr>
      <thead>

      <tbody>
          <tr class="reg" align="left">
            <td align="center" rowspan="7">0x0</td>
            <td align="center" rowspan="7">M_INT_ENABLES</td>
            <td class="fixWidth" align="center" rowspan="7">Interrupt Enable Reigsiter </td>
            <td align="center" rowspan="7">32</td>
            <td class="reserved" >[31:6]</td>
            <td class="reserved" >--</td>
            <td class="reserved" align="center">NA</td>
            <td class="reserved" align="center">0x0</td>
            <td class="reserved fixWidth2" >Reserved</td>
          </tr>          <tr align="left">
            <td class="" >[5]</td>
            <td class="" >srch_finish_en</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int enavle register</td>
          </tr>          <tr align="left">
            <td class="" >[4]</td>
            <td class="" >scd_done_en</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int enavle register</td>
          </tr>          <tr align="left">
            <td class="" >[3]</td>
            <td class="" >grp_done_en</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int enavle register</td>
          </tr>          <tr align="left">
            <td class="" >[2]</td>
            <td class="" >ssc_done_en</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int enavle register</td>
          </tr>          <tr align="left">
            <td class="" >[1]</td>
            <td class="" >pth_done_en</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int enavle register</td>
          </tr>          <tr align="left">
            <td class="" >[0]</td>
            <td class="" >psc_done_en</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int enavle register</td>
          </tr>          <tr class="reg" align="left">
            <td align="center" rowspan="7">0x4</td>
            <td align="center" rowspan="7">M_INT_MASK</td>
            <td class="fixWidth" align="center" rowspan="7">Interrupt Mask   Reigsiter </td>
            <td align="center" rowspan="7">32</td>
            <td class="reserved" >[31:6]</td>
            <td class="reserved" >--</td>
            <td class="reserved" align="center">NA</td>
            <td class="reserved" align="center">0x0</td>
            <td class="reserved fixWidth2" >Reserved</td>
          </tr>          <tr align="left">
            <td class="" >[5]</td>
            <td class="" >srch_finish_mask</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int mask register</td>
          </tr>          <tr align="left">
            <td class="" >[4]</td>
            <td class="" >scd_done_mask</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int mask register</td>
          </tr>          <tr align="left">
            <td class="" >[3]</td>
            <td class="" >grp_done_mask</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int mask register</td>
          </tr>          <tr align="left">
            <td class="" >[2]</td>
            <td class="" >ssc_done_mask</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int mask register</td>
          </tr>          <tr align="left">
            <td class="" >[1]</td>
            <td class="" >pth_done_mask</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int mask register</td>
          </tr>          <tr align="left">
            <td class="" >[0]</td>
            <td class="" >psc_done_mask</td>
            <td class="" align="center">RW</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int mask register</td>
          </tr>          <tr class="reg" align="left">
            <td align="center" rowspan="7">0x8</td>
            <td align="center" rowspan="7">M_INT_STATUS</td>
            <td class="fixWidth" align="center" rowspan="7">Interrupt status Reigsiter </td>
            <td align="center" rowspan="7">32</td>
            <td class="reserved" >[31:6]</td>
            <td class="reserved" >--</td>
            <td class="reserved" align="center">NA</td>
            <td class="reserved" align="center">0x0</td>
            <td class="reserved fixWidth2" >Reserved</td>
          </tr>          <tr align="left">
            <td class="" >[5]</td>
            <td class="" >srch_finish_stat</td>
            <td class="" align="center">RC</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int status register</td>
          </tr>          <tr align="left">
            <td class="" >[4]</td>
            <td class="" >scd_done_stat</td>
            <td class="" align="center">RC</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int status register</td>
          </tr>          <tr align="left">
            <td class="" >[3]</td>
            <td class="" >grp_done_stat</td>
            <td class="" align="center">RC</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int status register</td>
          </tr>          <tr align="left">
            <td class="" >[2]</td>
            <td class="" >ssc_done_stat</td>
            <td class="" align="center">RC</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int status register</td>
          </tr>          <tr align="left">
            <td class="" >[1]</td>
            <td class="" >pth_done_stat</td>
            <td class="" align="center">RC</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int status register</td>
          </tr>          <tr align="left">
            <td class="" >[0]</td>
            <td class="" >psc_done_stat</td>
            <td class="" align="center">RC</td>
            <td class="" align="center">0x0</td>
            <td class=" fixWidth2" >int status register</td>
          </tr>
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